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 Spec #CR #Revision #CR CatImpacted VersionTarget ReleaseTitleWG TDoc #CR status at WGWG meeting refWG Source informationTSG TDoc #CR status at TSGTSG meeting refTSG Source informationNew VersionWork ItemsRemarks
See details 25.1010117-F4.0.0Rel-4Correction of AICH performance Details R4-010593 agreedRAN4-#17 Details RP-010358 approvedRAN-#12R44.1.0TEI4 2G
See details 25.1010116-A4.0.0Rel-4on the Modification to OCNS code channels to allow for 384 kbps allocation Details R4-010781 agreedRAN4-#17 Details RP-010347 approvedRAN-#12R44.1.0TEI 2G
See details 25.1010114-A4.0.0Rel-4UE EVM definition Details R4-010752 agreedRAN4-#17 Details RP-010347 approvedRAN-#12R44.1.0TEI 2G
See details 25.1010112-A4.0.0Rel-4Clarification of limits for inner loop power control Details R4-010748 agreedRAN4-#17 Details RP-010347 approvedRAN-#12R44.1.0TEI 2G
See details 25.1010110-A4.0.0Rel-4out of synchronization handling Details R4-010789 agreedRAN4-#17 Details RP-010347 approvedRAN-#12R44.1.0TEI 2G
See details 25.1010108-A4.0.0Rel-4Terminology for power definition Details R4-010750 agreedRAN4-#17 Details RP-010347 approvedRAN-#12R44.1.0TEI 2G
See details 25.1010104-A4.0.0Rel-4UL DPCCH slot format for performance tests Details R4-010740 agreedRAN4-#17 Details RP-010347 approvedRAN-#12R44.1.0TEI 2G
See details 25.1010100-A4.0.0Rel-4Correction for SSDT test parameters Details R4-010527 agreedRAN4-#17 Details RP-010347 approvedRAN-#12R44.1.0TEI 2G